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Setting Up Multiword and Singleword DMA Data Transfers

To set up multiword DMA data transfers, the ATA Manager takes the values in ataMultiDMASpeed and ataMultiCycle fields of the ATA_SetDevConfig parameter block to create a multiword DMA cycle time in system hardware that maintains the timing required by the multiword DMA mode while not exceeding the indicated cycle time.

To set up singleword DMA data transfers, the ATA Manager takes the value specified in the ataSingleDMASpeed field of the ATA_SetDevConfig parameter block to create the appropriate cycle timing for the device. The ATA-2 specification has no recommended timing values for singleword DMA data transfer modes, only minimum cycle times.

When both the ataSingleDMASpeed and ataMultiDMASpeed fields in the ATA_SetDevConfig function parameter block are set to zero and the UseDMA flag in the ataFlags field is set true, the ATA Manager uses singleword DMA mode 0 timing for data transfers.

The UseConfigSpeed flag of the ataFlags field in the ataPBHdr parameter block header must be set for both the ataExecIO and ATA_SetDevConfig functions to utilize new timing configuration information. When the UseConfigSpeed flag is not set, new timing values are not calculated and saved during a ATA_SetDevConfig function call. When the UseConfigSpeed flag is not set and the UseDMA flag is specified, timing is set to singleword DMA mode 0. If the UseConfigSpeed flag is not set for an ataExecIO function, PIO mode 0 timing is use for commands and PIO data transfers.

Additional reference documentation related to Identify Device data transfer timing information for ATA devices can be found in the ANSI ATA-2 specification.

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